Last year, my PhD student Hazem Ali got a HiPEAC collaboration grant sponsoring a three month visit in the Electronic Systems group at Eindhoven University of Technology, hosted by Dr. Sander Stuijk. The topic of the joint research is related to the borderland between data-flow and traditional real-time analysis. On page 15 in the latest issue of the HiPEAC Newsletter, you can read more about his stay.
Manil Dev Gomony Successfully Defends PhD Thesis!
Today, Manil Dev Gomony has successfully defended his PhD thesis entitled “Scalable and Bandwidth-Efficient Memory Subsystem Design for Real-Time Systems“. The thesis proposes an architecture for a real-time memory subsystem that scales well in terms of area and maximum synthesizable frequency with an increasing number of memory clients. This subsystem architecture comprises a memory interconnect called Globally Arbitrated Memory Tree (GAMT) a Multi-Channel Memory Controller (MCMC), as well as a technique to couple those components and have a single point of arbitration for both resources. The thesis also proposes a design flow for automatically choosing the memory device, mapping clients to memory channel, and configure arbiters to satisfy client requirements.
Among Manil’s achievements, we specifically highlight two achievements with respect to publishing. First of all, he had a paper accepted at the DATE conference every year during his PhD. Secondly, none of his publications were ever rejected anywhere. This shows that Manil managed to publish in competitive forums in his field and that his work was well-received. Currently, Manil works as a Researcher at Bell Laboratories of Alcatel-Lucent in Belgium. We wish him the best of luck in his future career!
First PhD Student Graduates From the Memory Team
Davit Mirzoyan Successfully Defends PhD Thesis!
Karthik Chandrasekar Receives HiPEAC Collaboration Grant
Today, we celebrate that Karthik Chandrasekar has received a 3 month HiPEAC collaboration grant to visit the group of Prof. Norbert Wehn at Kaiserslautern Institute of Technology. The application process was competitive with approximately 30% of 67 proposals being funded. The grant serves to extend the existing collaboration between our two groups and will be used to conduct research on the hot topic of “Mobile and 3D-Stacked Wide I/O DRAM Power Modeling and Optimization”.
New PhD Student on the Memory Team
The memory team welcomes Yonghui Li who just embarked on the four year quest towards a PhD degree in the context of the T-CREST project. We wish him the best of luck on this endeavor and look forward to working together.