Category: Projects

Excited to share that our NWO OTP project DESIRE has been accepted!

Posted on by Benny Akesson

Together with ASML, University of Amsterdam, Leiden University, and TNO-ESI, we are starting a new research project on design-space exploration for complex distributed cyber-physical systems. Thank you ASML and TNO-ESI for contributing to the project, and to Philips, Canon Production Printing, Thales, Vanderlande, Eindhoven University of Technology, and University of Twente for joining the user committee.

Design-space Exploration for Complex Distributed Cyber-Physical Systems (DESIRE) builds on our earlier work in DSE 2.0, extending it toward an advanced holistic and automated approach to exploring alternative hardware platforms, software changes, and mappings — helping engineers answer critical what-if questions on performance and cost in increasingly complex systems. In particular, we will focus on:
1) Capturing realistic system behavior from traces while scaling to industrial systems with partial observability and complex environments
2) Bridging software and hardware characterization to enable model-based exploration of performance across heterogeneous platforms.
3) Handling extremely large, heterogeneous, multi-objective design spaces.

At the same time, it’s great to see how earlier results are already being picked up, matured, and experimented with in practice by TNO-ESI and ASML, closing the loop between academic research and industrial impact.

Looking forward to this next step in the collaboration!

The announcement of the grant from NWO is available here.

NWO Grants Funding for iCARe Project

Posted on by Benny Akesson

I am pleased to announce that the iCARe project (“Integrated indulgent Control Architecture design”) has been officially granted by NWO under the NXTGEN Hightech programme. The project brings together leading academic and industrial partners to rethink how high‑tech motion systems, such as those used in semiconductor manufacturing, are designed and optimized. With a total project budget of €3.3 million, iCARe aims to develop a radically new integrated control architecture that jointly considers servo control, computational hardware, and power electronics. This approach will enable next‑generation machines to achieve unprecedented accuracy and throughput while remaining cost‑effective, an essential step for future semiconductor technologies.

I will contribute to this project in my role as part-time professor at the University of Amsterdam (UvA). Together with partners from TU/e and ASML, UvA researchers (me, Andy Pimentel, and a PhD student) will develop innovative computational platform architectures, including new scheduling strategies and automated design‑space‑exploration tools that directly link computing performance to control‑system quality. This contribution is vital for enabling high‑precision control at extreme speeds and for integrating computing considerations into the heart of system‑engineering decisions. The project spans six years and will support collaborative research across multiple disciplines.

Congratulations to the iCARE consortium for securing this competitive funding and we look forward to working with you on this next step forward in high‑tech system design.

Read more in the official announcement from NWO or the news at University of Amsterdam.

TNO-ESI Cloud Continuum Workshop Connects Researchers and Promotes Collaboration in the Netherlands

Posted on by Benny Akesson

The TNO-ESI Cloud Continuum workshop, an informal hybrid event that attracted just over twenty participants, took place at ESI on February 21. The goals of this workshop were to: 1) connect applied and academic researchers in the area of cloud continuum in the Netherlands, 2) disseminate research results from ongoing research projects, and 3) identify possibilities for collaboration. Benny Akesson, the organizer of the event, opened the workshop by presenting some drivers for cloud adoption/integration in the high-tech industry, as well as the work done by ESI in the ArchViews and TRANSACT projects related to performance observability. This was followed by four invited speakers from Eindhoven University of Technology and Vrije Universiteit Amsterdam. The topics of the presentations ranged from reference architectures for the cloud continuum, root-cause analysis in the continuum, modelling and calibration of cyber-physical systems deployed in the continuum, to performance variability of cloud/edge systems. All in all, it was a nice and successful event that showcased parts of the body of work currently going on in this exciting area. Thank you Matthijs Jansen, Jeroen Voeten, Mahtab Modaber, and Panagiotis Giannakopoulos for your presentations.

Specification, Verification, and Adaptation of Software Interfaces using Eclipse ComMASuite

Posted on by Benny Akesson

Software interfaces are key to realizing the benefits of component-based software architectures, yet specifying interfaces is difficult and may result in problems in the protocol specification itself, or in its interactions with clients. This problem is addressed through a six-step methodology for specification, verification, and adaptation of software interfaces. The methodology builds on the open-source tool Eclipse ComMASuite, developed by TNO-ESI partners in an open innovation eco-system. The specification and verification steps have been contributed back to the community and are supported by a two-day course named “Modelling and Analysis of Component-based Systems”, available from TNO-ESI in both an academic and industry version.

Please read my blog post that describes the methodology and demonstrates it step-by-step from a user perspective through a simple case study in a video.

Proposal Building Dutch Real-time Systems Community Granted

Posted on by Benny Akesson

Recently, I submitted a small proposal worth 5K euro to the 4TU.NIRICT Call Community Funding together with Mitra Nasri and Geoffrey Nelissen, both from Eindhoven University of Technology, and Kuan-Hsun Chen from University of Twente. The purpose of the proposal was for creating a Dutch Real-time Systems community and stimulate collaboration both nationally and at the European level. Earlier this week, we were notified that the proposal was granted!

We plan to use the funding for building a Dutch real-time systems community by organizing a workshop in the Netherlands with several invited speakers (around 6) from other European countries, followed by a consolidation event after 3 months. The duration of the workshop will two days, and the target audience is the domain researchers affiliated with the 4TU and UvA. On each workshop day, there will be keynotes, rapid pitch talks, interactive panels, reviews of funding opportunities, and social meetings. The one-day consolidation event, (e.g., three months later) will focus on strengthening the Dutch real-time system community vision and on consolidating the initiatives planned at the workshop.

I look forward to working with Mitra, Geoffrey, and Kuan to organize a strong real-time systems community in the Netherlands through this grant, and through other means.

 

Vacancy for a PhD in Energy Labels for Digital Services

Posted on by Benny Akesson

Back in July, I announced that our project proposal “Zero-Waste Computing: Energy Labels for Digital Services” was granted for the Science and Design PhD program at the University of Amsterdam. Now, the Parallel Computing Systems (PCS) group  is looking for a suitable PhD candidate for this project. Among other things, this involves modelling and monitoring to determine how energy is consumed in digital services whose computations are distributed over device, edge, and cloud.

Find a more detailed description of the vacancy, as well as instructions for how to apply here. The application period ends on October 18.

Project Proposal about Energy Labels for Digital Services Granted

Posted on by Benny Akesson

It is my pleasure to announce our project proposal entitled “Zero-Waste Computing: Energy Labels for Digital Services” has been granted for the Science and Design PhD program at the University of Amsterdam. Ana Lucia Varbanescu is the main applicant for this project, with Anuj Pathania and myself as co-applicants. The project proposal was supported by Surf, ESI (TNO), Barcelona Supercomputing Center, and ASTRON.

The project addresses the issue that digital services are getting increasingly prevalent in society and are vital to the Dutch economy, already reaching 60% of GDP. However, they come with a significant, rapidly-increasing energy cost, raising sustainability concerns, since a mid-size datacenter alone consumes as much energy as a small town. However, datacenters are only the final link in a digital chain. Users interacting with devices — mobile phones, tablets, or laptops — trigger entire digital chains, combining multiple communicating computing layers and data transfers: from the device itself, through the edge, to the datacenter. Each layer has its own computing infrastructure (see figure). At each layer, decisions are made about how, where and when applications are running and/or data are transferred. These decisions have a significant impact on the user-perceived quality-of-service (QoS), but also on the energy consumption – per layer, and for the entire digital chain. The energy footprint of different devices along the chain might be known, but the actual energy consumed by the application is unknown, because it depends on infrastructure choices, and on user QoS requirements, and on mapping decisions made on the edge and in the datacenter. Thus, the energy efficiency, i.e., the amount of energy consumed to perform the actual task at hand, is largely unknown, for most digital chains.

We argue that the first step to reduce waste in computing is to quantify the energy efficiency of end-to-end digital chains. Our project focuses on designing an integrated framework (i.e., the methods, metrics, and tools) for this quantification effort. Specifically, we aim to define a reference architecture of digital chains, use it to define an analytical digital-chain energy-efficiency model that exposes the factors that impact energy efficiency along the chain, and support it with a high-level functional simulator to assess different operational scenarios and parameters that affect the energy efficiency of digital chains.

This is a small project funding only a single PhD student. More momentum is required to further advance this area and make a step from only monitoring the energy consumption of digital chains to also include actuation, e.g. energy minimization through workload redistribution, subject to performance constraints. We are currently looking for interested parties to collaborate with us on this topic in future project proposals.

Official Project Kick-off for DSE 2.0

Posted on by Benny Akesson

Today was the official project kick-off for the research project “Design Space Exploration 2.0: Towards Optimal Design of Complex, Distributed Cyber Physical Systems”. This project is a part of the Partnership Program Mastering Complexity (MasCot), funded by NWO Domain Applied and Engineering Sciences (AES) together with ESI (TNO). The University of Amsterdam and Leiden University are the academic partners, spearheaded by Andy Pimentel and Todor Stefanov. The carrying industrial partner is ASML, but with Philips, Siemens and ESI as parts of the user committee.

The main goal of the project is to extend existing methods for design-space exploration, often developed for on-chip systems, to cover complex distributed cyber-physical systems (dCPS), such as the lithography machines made by ASML. Designers of such systems need quick answers to so-called “what-if” questions with respect to possible design decisions/choices and their consequences on non-functional properties, such as system performance and cost. This calls for efficient and scalable system level design space exploration (DSE) methods that integrate appropriate application workload and system architectures models, simulation and optimization techniques, as well as supporting tools to facilitate the exploration of a wide range of design decisions. However, such DSE technology for complex dCPS does currently not exist. This projects hence tries to answer the question of how perform efficient and effective DSE for complex, distributed cyber-physical systems.

In today’s kick-off meeting, all stakeholders in the project had an opportunity to introduce themselves and refamiliarize themselves with the project and its goals. The two PhD students who will be working on the project, Marius and Faezeh, from UvA and Leiden, respectively, also gave a brief overview of the work they had done in the first three months of the project, which included a literature review and generation of high-level simulation models for different parameter settings.

I am directly involved in this project through my part-time appointment at UvA. As Marius’ second promotor, I will help him on his journey towards a PhD. I also have an interest in this project as an ESI Research Fellow and part of the MasCot Core Team. In this capacity, I am happy to help linking this project to ESI’s applied research projects, in particular at ASML, to exploit possible synergies, and to stimulate exchanges with other projects in the MasCot program.

DYNAMICS Project in Keynote at Software-Centric Systems Conference

Posted on by Benny Akesson

Two months ago, I mentioned that Bits & Chips had published an article about the ComMA (Component Modelling and Analysis) language and how it is being used in Philips and Thales to address challenges related to integration and evolution. The latter part, about semi-automatic detection and correction of interface incompatibilities as interfaces evolve is the topic of the DYNAMICS project, a research project between ESI (TNO) and Thales. This joint story, where two companies from different domains together presented their challenges and how it was addressed by technology developed by ESI was much appreciated by Bits & Chips and was invited as a keynote at the Software-Centric Systems Conference (SC2), which takes place on Thursday November 5. If you are interested in hearing this keynote, please register for the event. All presentations are also available on-demand after the event in case you cannot attend in real time.

Component Modelling and Analysis (ComMA) in Bits & Chips

Posted on by Benny Akesson

Bits & Chips just published an article about ComMA (Component Modelling and Analysis). ComMA addresses key design and verification challenges for complex systems comprising many components developed by different parties, challenges that are frequently encountered in the high-tech industry across application domains. The challenges are tackled by allowing structure and behavior of component interfaces to be formally specified using a set of domain-specific languages. From this specification, a number of artifacts are automatically generated, including system tests, run-time monitors that detect protocol violations, performance metrics, and documentation. Together, these artifacts reduce the time to design, integrate, and evolve complex high-tech systems, allowing the next generation of these systems to be developed faster and with higher quality.

ComMA was developed by ESI (TNO) in applied research projects with Philips. Successfully proving the approach in an industrial context at Philips has sparked interest from other companies, including Thermo Fisher Scientific, Thales, and Kulicke & Soffa. This eco-system of high-tech companies is expected to increase further as the ComMA tooling becomes open source as part of the Eclipse Foundation.

The article also mentions the applied research project DYNAMICS, for which I am the technical lead. Here, ESI and Thales have been looking at challenges and opportunities related to the evolution of interfaces. The strong point of interfaces is that they abstract from the component providing a particular functionality, allowing it to be changed or even replaced without compromising the overall functionality of the system. However, eventually the interfaces themselves need to be updated to prevent technical debt, and at that point all components relying on that interface are affected simultaneously. In the DYNAMICS project, we study how to automatically detect whether a change to the protocol of an interface is backwards compatible and if this is not the case, semi-automatically generate adapters that bridge the differences with previous versions. The benefit of this approach is that it reduces the time and cost of interface updates, allowing them to evolve faster and avoid creative workarounds that ultimately lead to unreliable systems and lower software quality. If you are interested in reading more about this work and how it leverages ComMA and Petri Net technology to achieve this, read this overview paper from last year.

Comma interfaces open the door to reliable high-tech systems