Tag: esweek

Prestigious Test Of Time Award at ESWEEK 2023 for Memory Controller Research

Posted on by bennyakesson

I am happy to announce that we received the Test Of Time Award for CODES+ISSS at ACM/IEEE Embedded Systems Week (ESWEEK) 2023 in Hamburg, Germany. The Test of Time Award is the most prestigious award of ESWEEK and honors the authors of papers of previous editions of the co-located conferences (CASES 2008, CODES+ISSS 2007, and EMSOFT 2007) that had the highest impact. We received this award for my first paper as a PhD student “Predator: a predictable SDRAM memory controller“, which written with co-authors Kees Goossens and Markus Ringhofer and published in CODES+ISSS 2007.

The paper addressed the problem of providing guarantees on bandwidth and latency to ports on an SDRAM memory controller, a key component of a system-on-chip. Previously, this was only done for statically scheduled memory controllers that assumed the workload of memory requests was known a priori. While this limitation was acceptable for simple systems, increasing integration of functionality in consumer electronics products like set-top boxes challenged this assumption, requiring more dynamic solutions. To this end, the paper presented concepts, hardware architecture, and performance analysis for a more dynamic SDRAM memory controller for real-time systems.

This work formed the base for my memory research, which evolved into a research line that would continue for over a decade and in which six PhD students eventually graduated. In total, this research resulted in a body of work of 30+ papers and two books, which together have been cited more than 2000 times. It also resulted in the open-source tool DRAMPower, which is used to estimate energy consumption of memories. This tool has been integrated in the popular Gem5 simulator and is widely used by the computer architecture community.

The paper was impactful because it was one of the first papers about memory controllers for real-time systems. More papers would follow from Barcelona Supercomputing Center, UC Berkley, and University of Waterloo. Step by step, the proposed memory controllers would become more dynamic and the analysis more sophisticated. This continued until the middle of the previous decade, at which the field moved more from proposing and analyzing new memory controller architectures for systems-on-chips to configuring and analyzing commercial-of-the-shelf memory controllers. This is still an active field of research in the real-time systems community today.

“Receiving this award is an unexpected honor, and I extend my heartfelt thanks to my co-authors and everyone that contributed to subsequent advancements in this field, in particular my former PhD students Karthik Chandrasekar, Manil Dev Gomony, Sven Goossens, Yonghui Li, and Anna Minaeva. Together, we created, developed, and matured the research field of memory controllers for real-time systems.”

Paper about Model-driven System Performance Engineering Accepted at ESWEEK Industry Session

Posted on by bennyakesson

The System Performance Expertise Team at ESI (TNO) has worked for a long time to consolidate our many years of experience across projects and companies. This effort has now culminated in a paper entitled “Model-driven System Performance Engineering for Cyber-physical Systems“, which has been accepted for the industry session at the Embedded Systems Week (ESWEEK) in October.

The paper describes ESI’s current view on the field of System-Performance Engineering (SysPE). SysPE encompasses modeling formalisms, methods, techniques, and industrial practices to design systems for performance, where performance is taken integrally into account during the whole system life cycle. Industrial SysPE state of practice is generally model-based. Due to the rapidly increasing complexity of systems, there is a need to develop and establish model-driven methods and techniques. To structure the field of SysPE, the paper identifies: (1) industrial challenges motivating the importance of SysPE, (2) scientific challenges that need to be addressed to establish model-driven SysPE, (3) important focus areas for SysPE and (4) best practices. A survey was conducted to collect feedback on our views. The responses were used to update and validate the identified challenges, focus areas, and best practices. The final result is presented in this paper. Interesting observations are that industry sees a need for better design-space exploration support, more than for additional performance modeling and analysis techniques. Also tools and integral methods for SysPE need attention. From the identified focus areas, scheduling and supervisory control is seen as lacking established best practices.

The paper will be presented as a part of Industry Session 2 at ESWEEK on October 12. The second talk of that session presents why and how ITEC, Nexperia, a world-leading manufacturer of semiconductor equipment, is moving towards model-driven system-level development. The session ends with a moderated Q&A. Since ESWEEK is an online event this year, you can register for 20 USD if you want to attend the conference and the session.

Update: The video of the Industry session is now available:

Three Presentations at ESWEEK

Posted on by bennyakesson

The Embedded Systems Week kicks off next week in Montreal, Canada. Two of my students will be giving a total of three presentations, which may be interesting for those following my work. First, Sven Goossens will be presenting his CODES+ISSS paper “A Reconfigurable Real-Time SDRAM Controller for Mixed Time-Criticality Systems” on Monday September 30 10:30 – 11:00. On Thursday October 3, approximately, 09:50 – 10:10, he will also summarize all of his work on memory controllers for mixed time-criticality systems in an invited presentation entitled “A Mixed Time-Criticality SDRAM Controller” at the Memory Architecture and Organization Workshop (MeAOW). At almost the same time, October 3 10:00 – 10:30, Davit Mirzoyan will present his paper “Throughput Analysis and Voltage-Frequency Island Partitioning for Streaming Applications under Process Variation” at the Symposium on Embedded Systems for Real-Time Multimedia (ESTIMedia). We hope to see you there!