Tag: latency-rate

William Ford Successfully Defends Master Thesis on Network Delay Models for dCPS

Posted on by bennyakesson

On Wednesday, William Ford, a master student from VU/UvA defended his master thesis “Network Delay Model Creation and Validation for Design Space Exploration of Distributed Cyber-Physical Systems“. This thesis was executed in the context of the MasCot project DSE2.0 and was supervised by Benny and Faezeh Sadat Saadatmand, PhD student at Leiden University.

William’s thesis focuses on improving the development process of complex distributed cyber-physical systems (dCPS), such as the equipment developed by high-tech companies like ASML, Canon Production Printing, and Philips. Building physical prototypes for these systems is complex and costly, so the thesis explores automated and scalable model-based Design Space Exploration (DSE) as a solution. The research addresses the challenge of modeling network delays in dCPS, aiming to create models that balance speed and accuracy for DSE purposes. The methodology includes formalizing network topology and traffic concepts, resulting in an open-source framework for synthetic network generation called GeNSim. Three analytical network delay models—Constant Delay, Constant Bandwidth, and Latency-Rate, and a simulation-based approach using the INET framework—are proposed and evaluated synthetic networks and an industry case study at ASML. The findings reveal that each model has its strengths and weaknesses, with no single model meeting all requirements perfectly. Therefore, a multi-step modeling approach is suggested to leverage the strengths and mitigate the weaknesses of the different models.

William confidently presented his thesis. In particular, the committee was very happy with the Q&A session after the presentation, which resulted in a lively back and forth with interesting questions and answers. Having defended his thesis, William can now apply for his diploma and graduate. We thank William for his contributions to the DSE2.0 research and wish him all the best with his future career.

Advancing Design Space Exploration: Literature Review Explores Network Delay Models for Distributed Cyber-Physical Systems

Posted on by bennyakesson

Another literature review has been completed in the context of the DSE2.0 research project. William Ford completed his review entitled “Network Delay Model Creation and Validation for Design Space Exploration of Distributed Cyber-Physical Systems“.

Design-space exploration (DSE) in early phases of design of a distributed cyber-physical system (dCPS) requires models. In the DSE2.0 project, we are particularly interested in models that capture the timing behavior of hardware and software, allowing temporal system performance to be evaluated for different design points. One important part of the system to model is the network that connects the subsystems of the CPS. This study reviews previous work in the fields of analytical network modeling, network simulation, and network model validation. In addition, a recommended plan is presented to create and validate such a network model for the DSE2.0 project, based on this previous work. Two main directions are recommended at different levels of abstraction. For the lower level of abstraction, we will make a model using the existing INET framework that models each network element explicitly. At a higher level of abstraction, we will use a latency-rate server to capture the behavior of the network using only two parameters, latency and rate.

Having delivered his literature review. William has started his master project to pursue this research along these directions. The team looks forward to working with him.

Article Accepted in Science of Computer Programming

Posted on by bennyakesson

The past two months have been very good to us with five journal articles being accepted in something resembling a ketchup-effect. The most recent addition is an article entitled “Certifying Execution Time in Multicores” that was accepted by the Elsevier journal Science of Computer Programming. In essence, this article is a summary of the PhD dissertation of Vitor Rodrigues, whom I collaborated with over the past years. My main contribution to this work is proposing the latency-rate model as an abstraction of the service provided by a shared resource, such as a memory. We incorporated this model into Vitors timing analysis tool based on abstract interpretation to enable scalable timing analysis of multi-core platforms with shared resources.

Successful Collaboration Lands Paper at PADL 2013

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Another successful collaboration has resulted in an accepted publication at the Fifteenth International Symposium on Practical Aspects of Declarative Languages (PADL). The title of the paper is “A Declarative Compositional Timing Analysis for Multicores Using the Latency-Rate Abstraction” and it was written together with Vitor Rodrigues, Simão Melo de Sousa, and Mário Florido from Universidade do Porto and Universidade da Beira Interior. The paper discusses the theory and declarative implementation of timing analysis for multi-cores using abstract interpretation. To manage the state-space explosion of possible interleavings of requests from different cores to shared resources, the latency-rate abstraction is proposed and proven to be sound in the context of the proposed analysis. The resulting loss of precision is then evaluated for a simple system where a memory is shared using TDM arbitration.

Memory Team Scores Four out of Four Accepted Papers at DATE 2013!

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The preliminary author notification for DATE 2013 is now available on the conference website and it reveals that the memory team scores an incredible four accepted papers out of the four submitted, resulting in an acceptance ratio of 100% for the team! The four paper titles are:

The papers cover topics ranging from memory controller architectures, configuration, and power modeling for Wide I/O memories to open-page policies in real-time memory controllers and a comparison between the tightness of bounds for the latency-rate abstraction and cycle-accurate simulation. These papers are also evidence of the many recent successful collaborations as there are authors from CISTER-ISEP Research Unit, Fortiss, and the Technical Universities in Eindhoven, Kaiserslautern and Munich.