Tag: design space exploration

Paper on Parallelism in dCPS Workload Modeling Accepted at Euromicro DSD 2025!

Posted on by Benny Akesson

I am thrilled to announce that the paper “Unraveling Parallelism in Automated Workload Modeling for Distributed Cyber-Physical Systems” has been accepted for publication at the 28th Euromicro Conference Series on Digital System Design (DSD). This paper was first-authored by Faezeh Sadat Saadatmand and is a result from the DSE2.0 project, a collaboration between University of Amsterdam, Leiden University, and ASML.

The paper addresses the problem of limited exploration of software-level parallelism in distributed Cyber-Physical Systems, due to fixed execution orders in current workload models used in design-space exploration. It proposes refined workload models based on execution traces that capture both inter- and intra-process dependencies, enabling safe task reordering and parallel execution without modifying the software. A case study on the ASML Twinscan lithography machine demonstrates performance improvements while maintaining functional correctness.

New Methodology for Efficient Design Space Exploration in Next-Gen Cyber-Physical Systems

Posted on by Benny Akesson

I’m excited to share that our journal article “CompDSE: A Methodology for Design Space Exploration of Computing Subsystems within Complex Cyber-Physical Systems” has been accepted for publication in IET Cyber-Physical Systems: Theory and Applications! The article, first-authored by Faezeh Sadat Saadatmand, outlines the model-based Design Space Exploration (DSE) approach we used in the DSE2.0 project. This project is a collaboration between Leiden University, the University of Amsterdam, and ASML, and is co-funded by NWO and TNO-ESI.

Our work addresses the need for efficient DSE techniques to evaluate potential design decisions and their impact on non-functional aspects like performance, reliability, and energy consumption in next-gen complex distributed cyber-physical systems (dCPS).

In the article, we introduce CompDSE, a methodology designed to facilitate the DSE of complex dCPS, with a focus on the computing subsystems. CompDSE uses abstract models of the application workload, computing hardware platform, and workload-to-platform mapping, all automatically derived from runtime trace data. These models are integrated into a discrete event simulation environment to explore various design points.

We demonstrate the effectiveness of our methodology through a case study on the ASML Twinscan lithography machine, a complex industrial dCPS. The results show potential performance enhancements by optimizing computing subsystems while considering physical constraints. Each design point evaluation takes less than a minute, highlighting CompDSE’s efficiency and scalability in tackling complex dCPS with large design spaces.

William Ford Successfully Defends Master Thesis on Network Delay Models for dCPS

Posted on by Benny Akesson

On Wednesday, William Ford, a master student from VU/UvA defended his master thesis “Network Delay Model Creation and Validation for Design Space Exploration of Distributed Cyber-Physical Systems“. This thesis was executed in the context of the MasCot project DSE2.0 and was supervised by Benny and Faezeh Sadat Saadatmand, PhD student at Leiden University.

William’s thesis focuses on improving the development process of complex distributed cyber-physical systems (dCPS), such as the equipment developed by high-tech companies like ASML, Canon Production Printing, and Philips. Building physical prototypes for these systems is complex and costly, so the thesis explores automated and scalable model-based Design Space Exploration (DSE) as a solution. The research addresses the challenge of modeling network delays in dCPS, aiming to create models that balance speed and accuracy for DSE purposes. The methodology includes formalizing network topology and traffic concepts, resulting in an open-source framework for synthetic network generation called GeNSim. Three analytical network delay models—Constant Delay, Constant Bandwidth, and Latency-Rate, and a simulation-based approach using the INET framework—are proposed and evaluated synthetic networks and an industry case study at ASML. The findings reveal that each model has its strengths and weaknesses, with no single model meeting all requirements perfectly. Therefore, a multi-step modeling approach is suggested to leverage the strengths and mitigate the weaknesses of the different models.

William confidently presented his thesis. In particular, the committee was very happy with the Q&A session after the presentation, which resulted in a lively back and forth with interesting questions and answers. Having defended his thesis, William can now apply for his diploma and graduate. We thank William for his contributions to the DSE2.0 research and wish him all the best with his future career.

Automatic Workload Inference Improves Scalability of DSE in Complex Systems

Posted on by Benny Akesson

I am happy to announce that the paper “Automated Derivation of Application Workload Models for Design Space Exploration of Industrial Distributed Cyber-Physical Systems” has been accepted for publication at the 7th IEEE International Conference on Industrial Cyber-Physical Systems (ICPS). The paper is first-authored by Faezeh Saadatmand in the context of the DSE2.0 project, a part of the academic research program MasCot, co-funded by TNO-ESI and NWO. Congratulations Faezeh!

The paper addresses challenges with respect to designing their next-generation distributed cyber-physical systems (dCPS). Efficient Design Space Exploration (DSE) techniques are needed to evaluate possible design decisions and their consequences on non-functional aspects of the systems. To enable scalable and efficient DSE of complex dCPS, it is essential to have abstract and coarse-grained models that are both accurate and capable of capturing dynamic application workloads. However, manually creating such models is time-consuming and error-prone, and they need to be continuously updated as the system evolves. This research addresses this need by introducing an automatic method for deriving an application workload model. This model, based on trace analysis, captures computation and communication activities within an application in a timing-agnostic manner. The approach has been validated through a case study on an ASML Twinscan lithography machine, demonstrating high accuracy in capturing real application workloads. Next steps in this research involves combining this model with an automatically inferred hardware platform model to enable DSE exploring different hardware, software, and mapping alternatives.

Master’s Student Marijn Vollaard Shines with Study on Hardware Dimensioning for Microservice Applications in Cyber-Physical Systems

Posted on by Benny Akesson

Our master’s student, Marijn Vollaard, has achieved a significant milestone by completing and presenting his literature study titled “Hardware Dimensioning for Microservice Applications in Cyber-Physical Systems: Current Directions and Challenges” The study addresses the challenge of dimensioning the number of compute nodes required to meet the performance demands of microservice-based applications in cyber-physical systems. It thoroughly reviews an extensive body of literature on application and system profiling, performance prediction, and design-space exploration to establish the current state of knowledge in this field. The survey culminates in a discussion about how the surveyed literature applies to microservice applications, the cyber-physical systems context, and the problem of hardware dimensioning. Overall, this is a nice piece of work with a lot of references presented in a systematic way. Congratulations to Marijn for his great effort!”