Double Whammy: Two Master Theses Successfully Defended

Today, we had a double whammy! Two excellent master students from the University of Amsterdam that conducted their projects as internships with TNO-ESI have defended their work on the same day. Both projects were conducted in the context of an applied research project conducted in partnership between TNO-ESI and Thales and share a common context. As cyber-physical systems are getting increasingly complex and software-intensive, the industry is looking for new design methodologies to increase engineering productivity. One promising direction is to automatically synthesize systems from a set of requirements. This may involve selecting the components to integrate and mapping and deploying software on available hardware nodes. The design space for system synthesis is huge, but can be efficiently navigated using a design-space exploration tool that iteratively optimizes the design.

One challenge for such a design-space exploration tool is to quickly estimate the performance of selected software components for a candidate mapping to hardware nodes. Jan Przystal’s thesis Early Software Performance Prediction in Cyber-Physical System Design tackles exactly this challenge. Building on the Bubble Up method, in particular on the thesis of our previous student Bruno Dzikowski, his thesis investigates how the performance of software components can be predicted early in the design process, before a complete system has been built or deployed. Rather than relying on time-consuming simulations or exhaustive testing of all possible deployment configurations, the Bubble Up method individually characterizes software components by how sensitive they are to contention in shared resources and how much contention they create themselves. These individual characterizations allow performance predictions to be made quickly for any pair of  applications, as shown in the figure below. Jan’s work significantly improved the prediction accuracy and reduced the profiling time compared to the baseline. In addition, he extended the baseline approach to cover realistic deployment scenarios with many co-located applications. He also took the first steps beyond sharing only memory resources by investigating how sharing CPU resources affects application performance and how these effects can be incorporated into the prediction framework. Ultimately, his work brings automated system synthesis one step closer by enabling design-space exploration tools to rapidly assess the performance implications of alternative software-to-hardware mappings.

The work of Toine van Wonderen addresses a quite different aspect of system synthesis. It observes that design-space exploration evaluates many, many, possible candidate system configurations and provides an optimized solution, but it does not teach developers anything about what actually makes a particular configuration good or bad. To this end, his thesis Interpretable DSE – Extracting Design Principles from the Automated Synthesis of Hierarchical dCPS aims to automatically extract design principles from the design-space exploration process. In his work, Toine developed a methodology that first converts synthesized system configurations into a novel interpretable representation and then uses machine-learning techniques to learn the relationships between design decisions and resulting system quality attributes. By applying explainable AI techniques, in particular SHAP (SHapley Additive exPlanations), his approach identifies which design choices contribute most to a solution’s quality, as shown in the SHAP beeswarm plot below. Rather than treating the outcome of design-space exploration as a black box, his work enables engineers to understand why certain solutions emerge and what design principles can be derived from them. Evaluated on a complex case study from the defense domain, the approach demonstrated that valuable architectural insights can be extracted automatically from the large volumes of data generated during design-space exploration. In this way, Toine’s work complements the optimization capabilities of automated system synthesis by turning exploration results into actionable knowledge that can support future design decisions and deepen engineers’ understanding of complex system architectures.

Congratulations Jan and Toine on successfully defending your theses and completing your MSc degrees! We wish you both every success in the next steps of your careers.

NWO Grants Funding for iCARe Project

I am pleased to announce that the iCARe project (“Integrated indulgent Control Architecture design”) has been officially granted by NWO under the NXTGEN Hightech programme. The project brings together leading academic and industrial partners to rethink how high‑tech motion systems, such as those used in semiconductor manufacturing, are designed and optimized. With a total project budget of €3.3 million, iCARe aims to develop a radically new integrated control architecture that jointly considers servo control, computational hardware, and power electronics. This approach will enable next‑generation machines to achieve unprecedented accuracy and throughput while remaining cost‑effective, an essential step for future semiconductor technologies.

I will contribute to this project in my role as part-time professor at the University of Amsterdam (UvA). Together with partners from TU/e and ASML, UvA researchers (me, Andy Pimentel, and a PhD student) will develop innovative computational platform architectures, including new scheduling strategies and automated design‑space‑exploration tools that directly link computing performance to control‑system quality. This contribution is vital for enabling high‑precision control at extreme speeds and for integrating computing considerations into the heart of system‑engineering decisions. The project spans six years and will support collaborative research across multiple disciplines.

Congratulations to the iCARE consortium for securing this competitive funding and we look forward to working with you on this next step forward in high‑tech system design.

Read more in the official announcement from NWO or the news at University of Amsterdam.

Paper on Parallelism in dCPS Workload Modeling Accepted at Euromicro DSD 2025!

I am thrilled to announce that the paper “Unraveling Parallelism in Automated Workload Modeling for Distributed Cyber-Physical Systems” has been accepted for publication at the 28th Euromicro Conference Series on Digital System Design (DSD). This paper was first-authored by Faezeh Sadat Saadatmand and is a result from the DSE2.0 project, a collaboration between University of Amsterdam, Leiden University, and ASML.

The paper addresses the problem of limited exploration of software-level parallelism in distributed Cyber-Physical Systems, due to fixed execution orders in current workload models used in design-space exploration. It proposes refined workload models based on execution traces that capture both inter- and intra-process dependencies, enabling safe task reordering and parallel execution without modifying the software. A case study on the ASML Twinscan lithography machine demonstrates performance improvements while maintaining functional correctness.

New Methodology for Efficient Design Space Exploration in Next-Gen Cyber-Physical Systems

I’m excited to share that our journal article “CompDSE: A Methodology for Design Space Exploration of Computing Subsystems within Complex Cyber-Physical Systems” has been accepted for publication in IET Cyber-Physical Systems: Theory and Applications! The article, first-authored by Faezeh Sadat Saadatmand, outlines the model-based Design Space Exploration (DSE) approach we used in the DSE2.0 project. This project is a collaboration between Leiden University, the University of Amsterdam, and ASML, and is co-funded by NWO and TNO-ESI.

Our work addresses the need for efficient DSE techniques to evaluate potential design decisions and their impact on non-functional aspects like performance, reliability, and energy consumption in next-gen complex distributed cyber-physical systems (dCPS).

In the article, we introduce CompDSE, a methodology designed to facilitate the DSE of complex dCPS, with a focus on the computing subsystems. CompDSE uses abstract models of the application workload, computing hardware platform, and workload-to-platform mapping, all automatically derived from runtime trace data. These models are integrated into a discrete event simulation environment to explore various design points.

We demonstrate the effectiveness of our methodology through a case study on the ASML Twinscan lithography machine, a complex industrial dCPS. The results show potential performance enhancements by optimizing computing subsystems while considering physical constraints. Each design point evaluation takes less than a minute, highlighting CompDSE’s efficiency and scalability in tackling complex dCPS with large design spaces.

William Ford Successfully Defends Master Thesis on Network Delay Models for dCPS

On Wednesday, William Ford, a master student from VU/UvA defended his master thesis “Network Delay Model Creation and Validation for Design Space Exploration of Distributed Cyber-Physical Systems“. This thesis was executed in the context of the MasCot project DSE2.0 and was supervised by Benny and Faezeh Sadat Saadatmand, PhD student at Leiden University.

William’s thesis focuses on improving the development process of complex distributed cyber-physical systems (dCPS), such as the equipment developed by high-tech companies like ASML, Canon Production Printing, and Philips. Building physical prototypes for these systems is complex and costly, so the thesis explores automated and scalable model-based Design Space Exploration (DSE) as a solution. The research addresses the challenge of modeling network delays in dCPS, aiming to create models that balance speed and accuracy for DSE purposes. The methodology includes formalizing network topology and traffic concepts, resulting in an open-source framework for synthetic network generation called GeNSim. Three analytical network delay models—Constant Delay, Constant Bandwidth, and Latency-Rate, and a simulation-based approach using the INET framework—are proposed and evaluated synthetic networks and an industry case study at ASML. The findings reveal that each model has its strengths and weaknesses, with no single model meeting all requirements perfectly. Therefore, a multi-step modeling approach is suggested to leverage the strengths and mitigate the weaknesses of the different models.

William confidently presented his thesis. In particular, the committee was very happy with the Q&A session after the presentation, which resulted in a lively back and forth with interesting questions and answers. Having defended his thesis, William can now apply for his diploma and graduate. We thank William for his contributions to the DSE2.0 research and wish him all the best with his future career.

Automatic Workload Inference Improves Scalability of DSE in Complex Systems

I am happy to announce that the paper “Automated Derivation of Application Workload Models for Design Space Exploration of Industrial Distributed Cyber-Physical Systems” has been accepted for publication at the 7th IEEE International Conference on Industrial Cyber-Physical Systems (ICPS). The paper is first-authored by Faezeh Saadatmand in the context of the DSE2.0 project, a part of the academic research program MasCot, co-funded by TNO-ESI and NWO. Congratulations Faezeh!

The paper addresses challenges with respect to designing their next-generation distributed cyber-physical systems (dCPS). Efficient Design Space Exploration (DSE) techniques are needed to evaluate possible design decisions and their consequences on non-functional aspects of the systems. To enable scalable and efficient DSE of complex dCPS, it is essential to have abstract and coarse-grained models that are both accurate and capable of capturing dynamic application workloads. However, manually creating such models is time-consuming and error-prone, and they need to be continuously updated as the system evolves. This research addresses this need by introducing an automatic method for deriving an application workload model. This model, based on trace analysis, captures computation and communication activities within an application in a timing-agnostic manner. The approach has been validated through a case study on an ASML Twinscan lithography machine, demonstrating high accuracy in capturing real application workloads. Next steps in this research involves combining this model with an automatically inferred hardware platform model to enable DSE exploring different hardware, software, and mapping alternatives.

Master’s Student Marijn Vollaard Shines with Study on Hardware Dimensioning for Microservice Applications in Cyber-Physical Systems

Our master’s student, Marijn Vollaard, has achieved a significant milestone by completing and presenting his literature study titled “Hardware Dimensioning for Microservice Applications in Cyber-Physical Systems: Current Directions and Challenges” The study addresses the challenge of dimensioning the number of compute nodes required to meet the performance demands of microservice-based applications in cyber-physical systems. It thoroughly reviews an extensive body of literature on application and system profiling, performance prediction, and design-space exploration to establish the current state of knowledge in this field. The survey culminates in a discussion about how the surveyed literature applies to microservice applications, the cyber-physical systems context, and the problem of hardware dimensioning. Overall, this is a nice piece of work with a lot of references presented in a systematic way. Congratulations to Marijn for his great effort!”