Category: Awards

Faezeh Saadatmand Wins Best Paper Award at ICPS

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Good news everyone! Our paper “Automated Derivation of Application Workload Models for Design Space Exploration of Industrial Distributed Cyber-Physical Systems” won the Best Paper Award at the 7th IEEE International Conference on Industrial Cyber-Physical Systems (ICPS). This is an impressive feat, especially considering that it is the first paper first-authored by Faezeh Saadatmand, PhD student at Leiden University. Congratulations Faezeh!

The paper tackles an urgent issue: the growing complexity of industrial cyber-physical systems, which is driving up development and maintenance costs. As these systems incorporate more functions, the number of hardware and software components increases rapidly, making it harder to analyze and optimize their performance. Model-based methodologies have been proposed as a means to manage complexity and increase productivity of engineers by using models as a base for specification, communication, analysis, and synthesis of artifacts like documentation, simulation models, and code. But who is going to make models of systems with tens of compute nodes and hundreds of software processes, especially when increased customization results in a unique configuration for each manufactured system? This research addresses this need by introducing an automatic method for deriving an application workload model. This model, based on trace analysis, captures computation and communication activities within an application in a timing-agnostic manner. The method was validated through a case study on an ASML Twinscan lithography machine, showing high accuracy in representing real application workloads.

This paper is a result from the Design Space Exploration 2.0 (DSE2.0) project, one of four academic projects co-funded by TNO-ESI and NWO as a part of the Mastering Complexity (MasCot) program.

 

 

Mastering Complexity at ICT.Open

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This week saw another edition of NWO ICT.OPEN, a yearly event that brings scientists from all ICT research disciplines and industries together to learn, share ideas, and network.

My colleague Rosilde Corvino and I from TNO-ESI chaired the Mastering Complexity for Cyber-Physical Systems track. This track was kicked off with a keynote about software architecture for strategic advantage, given by Erik Schepers, Chief Software Architect at Thales. Two presentations followed about using large language models to manage software legacy and task-oriented programming for the Internet of Things, respectively. Approximately 30 participants attended the track, highlighting its relevance and the keen interest in cyber-physical systems. The event also saw a few projects from ESI’s Mastering Complexity (MasCot) academic program, DSE2.0 and Software Restructuring, being present with posters.

Lastly, the poster “Models for Legacy Software Systems,” authored by ESI colleagues Joe Reynolds, Nan Yang, Rosilde Corvino, Anca-Maria Lichiardopol, and Joost van Zwam, won the best poster award at the ICT.Open conference. The work has been prized for its innovation, applicability, and clarity of presentation. Congratulations to the team for this achievement, and kudos to Joe Reynolds for his outstanding presentation, demo, and poster explanation.

Next Tuesday, it is time for the next event, the crown jewel of ESI, the ESI Symposium 2024. It is still possible to register for free. I hope to see you there!

Prestigious Test Of Time Award at ESWEEK 2023 for Memory Controller Research

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I am happy to announce that we received the Test Of Time Award for CODES+ISSS at ACM/IEEE Embedded Systems Week (ESWEEK) 2023 in Hamburg, Germany. The Test of Time Award is the most prestigious award of ESWEEK and honors the authors of papers of previous editions of the co-located conferences (CASES 2008, CODES+ISSS 2007, and EMSOFT 2007) that had the highest impact. We received this award for my first paper as a PhD student “Predator: a predictable SDRAM memory controller“, which written with co-authors Kees Goossens and Markus Ringhofer and published in CODES+ISSS 2007.

The paper addressed the problem of providing guarantees on bandwidth and latency to ports on an SDRAM memory controller, a key component of a system-on-chip. Previously, this was only done for statically scheduled memory controllers that assumed the workload of memory requests was known a priori. While this limitation was acceptable for simple systems, increasing integration of functionality in consumer electronics products like set-top boxes challenged this assumption, requiring more dynamic solutions. To this end, the paper presented concepts, hardware architecture, and performance analysis for a more dynamic SDRAM memory controller for real-time systems.

This work formed the base for my memory research, which evolved into a research line that would continue for over a decade and in which six PhD students eventually graduated. In total, this research resulted in a body of work of 30+ papers and two books, which together have been cited more than 2000 times. It also resulted in the open-source tool DRAMPower, which is used to estimate energy consumption of memories. This tool has been integrated in the popular Gem5 simulator and is widely used by the computer architecture community.

The paper was impactful because it was one of the first papers about memory controllers for real-time systems. More papers would follow from Barcelona Supercomputing Center, UC Berkley, and University of Waterloo. Step by step, the proposed memory controllers would become more dynamic and the analysis more sophisticated. This continued until the middle of the previous decade, at which the field moved more from proposing and analyzing new memory controller architectures for systems-on-chips to configuring and analyzing commercial-of-the-shelf memory controllers. This is still an active field of research in the real-time systems community today.

“Receiving this award is an unexpected honor, and I extend my heartfelt thanks to my co-authors and everyone that contributed to subsequent advancements in this field, in particular my former PhD students Karthik Chandrasekar, Manil Dev Gomony, Sven Goossens, Yonghui Li, and Anna Minaeva. Together, we created, developed, and matured the research field of memory controllers for real-time systems.”

RTNS Outstanding Paper Award and Best Student Paper Award

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The 27th International Conference on Real-Time Networks and Systems (RTNS) in Toulouse, France is over. Our paper “Response Time Analysis of Multiframe Mixed-Criticality Systems” received not one, but two awards! Before the conference, we were notified that it had received an Outstanding Paper Award, as listed in the conference program. During the conference, we also learned that it received a Best Student Paper Award. I would like to take this opportunity to congratulate Ishfaq Hussain, PhD student at CISTER and first author of the paper. This seems like a good start of a distinguished research career.

Outstanding Paper Award at ECRTS

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I am pleased to announce that our paper “Cache-Persistence-Aware Response-Time Analysis for Fixed-Priority Preemptive Systems” got an Outstanding Paper Award at the Euromicro Conference on Real-Time Systems (ECRTS) in Toulouse. We are glad that the work was well-received and hope that the community will enjoy reading the paper.

Paper Accepted at RTAS 2016

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Yonghui Li is on a roll! Two months ago he received the best paper award at ESTIMEDIA for his work on modelling and analysis of a dynamically scheduled DRAM controller using mode-controlled data-flow graphs. Now, he just had a paper entitled “Modeling and Verification of Dynamic Command Scheduling for Real-Time Memory Controllers” that models and analyses the same memory controller using timed atomata. A key highlight of this work is that it quantitatively compares data-flow analysis, timed automata, and two other approaches from Yonghui’s 2015 article in Real-Time Systems in terms of guaranteed bandwidth and worst-case execution time. This gives interesting insights into what these different approaches can and cannot model and what the impact of those limitations are on the performance guarantees. This work was the result of a fruitful collaboration with Kai Lampka from Uppsala University in Sweden.

Yonghui Li Wins Best Paper Award at ESTIMEDIA

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We won the Best Paper Award at the 13th IEEE Symposium on Embedded Systems for Real-Time Multimedia (ESTIMedia) for our paper “Mode-Controlled Data-Flow Modeling of Real-Time Memory Controllers“. The paper was first-authored by Yonghui Li and was a successful collaboration with Orlando Moreira (previously with ST-Ericsson, currently with Intel) and two of his PhD students at Eindhoven University of Technology. We are happy that our work was well-received and hope the community will like the paper.