Reflections on RTAS 2024: A Successful Symposium in Hong Kong

The 30th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2024) is over. As I am enjoying a last local beer at Hong Kong airport before getting on my flight home, it feels like a good opportunity to reflect on this years successful edition of the conference.

The preparation of this conference has taken me, as the Program Chair, about one year. While it was a lot of work, I enjoyed it a lot because I got to work with dedicated, clever, and proactive people from the real-time systems community to make it happen. This year, we received 124 paper submissions from around the world, marking a 40% increase from last year. This suggests that the community is recovering well post-pandemic and there is a clear interest in the topics covered by the conference.

The Program Committee comprised 61 reviewers, supported by 87 sub-reviewers, blending expertise from a diverse group of experts in both academia and industry. Each submission was evaluated through at least four reviews, resulting in a total of nearly 500 double-anonymous expert reviews. Based on these reviews, a brief author response to the reviews to clarify misunderstandings, and online discussions, 29 papers This resulted in an acceptance rate of 23.3%, which means it was very competitive! The accepted papers formed the basis for the outstanding technical program.

Having spent so much time preparing the conference, I really wanted the execution to go smoothly, giving all 100 registered participants a good experience of the technical program. I was happy to see that the preparation had paid off and that there was very little work for me during the conference itself. The session chairs did an excellent job introducing the speakers and managing the sessions. The only curve ball was that one author did not get their visa on time, so we had to quickly improvise a setup for giving remote presentations. This was handled beautifully by the local organizers and I would like to thank Nan Guan and his colleagues for their hard work and attentiveness. From my perspective, the local arrangements worked perfectly!

I was impressed with the quality of the presentations of this edition. Despite the theoretical nature of much of the research, I was pleased to see that presenters managed to focus on their main messages and used lots of figures and animations to get high-level concepts across and referring to the papers for the details. I am asking myself if we, as a community, are getting better at presenting or if this is a side-effect of that we had to reduce the presentation time of the papers from 25 minutes to 18 minutes to fit the increased number of papers in the sessions. Whatever it was, I liked it and hope that this sets the bar for next time!

There were many excellent contributions in the technical program. From Marco Caccamo’s Outstanding Technical Achievement and Leadership Award lecture, we learned that there are many software-based memory management techniques and execution models that can improve the predictability of commercial-of-the-shelf (COTS) multi-processor systems-on-chip and make them suitable for hard real-time or mixed-criticality applications. This is an area where I feel we are making good progress. COTS systems are getting increasingly configurable and observable, allowing our community to propose solutions for real-time systems that do not require custom hardware. This lowers the threshold for transferring our research results to industry significantly.

Looking at the topics addressed at the conference, I was surprised by the large number of papers looking at the intersection of real-time systems and security, so many we needed two sessions to fit all of them! I particularly remember work considering how to ensure control-flow integrity when faced with malicious actors. Two papers looked into how this could be addressed leveraging features recently introduced in COTS platforms. There were also works looking at the effects of performance interference, such as random delays, on cyber-physical systems and how they could be mitigated using robust control strategies in stochastic control systems.

Considering the technical solutions that were presented, I really enjoyed the work by Soni et al. that addressed the scalability of timing analysis of AFDX networks in the avionics domain. The paper proposed a hybrid approach that combined an exact analysis using model checking with a faster and more pessimistic analysis using network calculus. The key idea was to use the bounds provided by network calculus to prune the state space for the model checker to reduce analysis time. I really liked that this hybrid approach worked both ways and allowed the exact analysis done so far by the model checker, to be leveraged by the network calculus to reduce its pessimism. This allowed the proposed analysis to scale to large industrial use cases with more than 1000 network flows.

There is of course a lot more to say about the conference and the papers featured in it, but it is time to fly home.
I want to conclude by thanking all the people that contributed to the organization of the conference. I also want to thank all authors who submitted their work to RTAS 2024. Lastly, I want to thank all conference participants for coming to Hong Kong to listen, learn, discuss, and network. That is what the community is all about!

For more information about RTAS 2024 and the papers featured in its program, please refer to the RTAS 2024 website.

Paper Accepted at RTAS

A paper entitled “Partitioning and Analysis of the Network-on-Chip on a COTS Many-Core Platform” was recently accepted for publication at RTAS. This paper was a collaboration with former colleagues at the CISTER Research Unit, as well as friends from MDH in Sweden. The paper addresses the issue of interference between applications in many-core platforms interconnected using rate-regulated Networks-on-Chip (NoC), such as the Kalray MPPA. The main contributions of the paper are 1) a partitioning strategy for reducing contention on the NoC, 2) an analysis technique to determine the Worst-Case Traversal Time of packages under the proposed strategy, and 3) a method to determine parameters for the NoCs rate regulators to get minimal WCTT and ensure that buffers never overflow. The benefits of the proposed approach is evaluated both using simulation and by experiments on a Kalray MPPA. Furthermore, an industrial case study from the automotive domain shows the tightness of the proposed analysis.

Paper Accepted at RTAS 2016

Yonghui Li is on a roll! Two months ago he received the best paper award at ESTIMEDIA for his work on modelling and analysis of a dynamically scheduled DRAM controller using mode-controlled data-flow graphs. Now, he just had a paper entitled “Modeling and Verification of Dynamic Command Scheduling for Real-Time Memory Controllers” that models and analyses the same memory controller using timed atomata. A key highlight of this work is that it quantitatively compares data-flow analysis, timed automata, and two other approaches from Yonghui’s 2015 article in Real-Time Systems in terms of guaranteed bandwidth and worst-case execution time. This gives interesting insights into what these different approaches can and cannot model and what the impact of those limitations are on the performance guarantees. This work was the result of a fruitful collaboration with Kai Lampka from Uppsala University in Sweden.

Paper Accepted at RTAS 2015

We just had a paper accepted at the Real-Time and Embedded Technology and Applications Symposium (RTAS) in Seattle. The paper is entitled “An Efficient Configuration Methodology for Time-Division Multiplexed Single Resources” and presents an ILP-based methodology to allocate TDM slots to resource clients, such that bandwidth and latency constraints are satisfied while resource utilization is minimized. A heuristic algorithm is furthermore proposed to determine the number of TDM slots in the schedule. This paper is a collaboration both with colleagues here at CTU Prague and with Andrew Nelson from Eindhoven University of Technology.

For the camera-ready version of the paper, please click here.