Reflections on RTAS 2024: A Successful Symposium in Hong Kong

The 30th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2024) is over. As I am enjoying a last local beer at Hong Kong airport before getting on my flight home, it feels like a good opportunity to reflect on this years successful edition of the conference.

The preparation of this conference has taken me, as the Program Chair, about one year. While it was a lot of work, I enjoyed it a lot because I got to work with dedicated, clever, and proactive people from the real-time systems community to make it happen. This year, we received 124 paper submissions from around the world, marking a 40% increase from last year. This suggests that the community is recovering well post-pandemic and there is a clear interest in the topics covered by the conference.

The Program Committee comprised 61 reviewers, supported by 87 sub-reviewers, blending expertise from a diverse group of experts in both academia and industry. Each submission was evaluated through at least four reviews, resulting in a total of nearly 500 double-anonymous expert reviews. Based on these reviews, a brief author response to the reviews to clarify misunderstandings, and online discussions, 29 papers This resulted in an acceptance rate of 23.3%, which means it was very competitive! The accepted papers formed the basis for the outstanding technical program.

Having spent so much time preparing the conference, I really wanted the execution to go smoothly, giving all 100 registered participants a good experience of the technical program. I was happy to see that the preparation had paid off and that there was very little work for me during the conference itself. The session chairs did an excellent job introducing the speakers and managing the sessions. The only curve ball was that one author did not get their visa on time, so we had to quickly improvise a setup for giving remote presentations. This was handled beautifully by the local organizers and I would like to thank Nan Guan and his colleagues for their hard work and attentiveness. From my perspective, the local arrangements worked perfectly!

I was impressed with the quality of the presentations of this edition. Despite the theoretical nature of much of the research, I was pleased to see that presenters managed to focus on their main messages and used lots of figures and animations to get high-level concepts across and referring to the papers for the details. I am asking myself if we, as a community, are getting better at presenting or if this is a side-effect of that we had to reduce the presentation time of the papers from 25 minutes to 18 minutes to fit the increased number of papers in the sessions. Whatever it was, I liked it and hope that this sets the bar for next time!

There were many excellent contributions in the technical program. From Marco Caccamo’s Outstanding Technical Achievement and Leadership Award lecture, we learned that there are many software-based memory management techniques and execution models that can improve the predictability of commercial-of-the-shelf (COTS) multi-processor systems-on-chip and make them suitable for hard real-time or mixed-criticality applications. This is an area where I feel we are making good progress. COTS systems are getting increasingly configurable and observable, allowing our community to propose solutions for real-time systems that do not require custom hardware. This lowers the threshold for transferring our research results to industry significantly.

Looking at the topics addressed at the conference, I was surprised by the large number of papers looking at the intersection of real-time systems and security, so many we needed two sessions to fit all of them! I particularly remember work considering how to ensure control-flow integrity when faced with malicious actors. Two papers looked into how this could be addressed leveraging features recently introduced in COTS platforms. There were also works looking at the effects of performance interference, such as random delays, on cyber-physical systems and how they could be mitigated using robust control strategies in stochastic control systems.

Considering the technical solutions that were presented, I really enjoyed the work by Soni et al. that addressed the scalability of timing analysis of AFDX networks in the avionics domain. The paper proposed a hybrid approach that combined an exact analysis using model checking with a faster and more pessimistic analysis using network calculus. The key idea was to use the bounds provided by network calculus to prune the state space for the model checker to reduce analysis time. I really liked that this hybrid approach worked both ways and allowed the exact analysis done so far by the model checker, to be leveraged by the network calculus to reduce its pessimism. This allowed the proposed analysis to scale to large industrial use cases with more than 1000 network flows.

There is of course a lot more to say about the conference and the papers featured in it, but it is time to fly home.
I want to conclude by thanking all the people that contributed to the organization of the conference. I also want to thank all authors who submitted their work to RTAS 2024. Lastly, I want to thank all conference participants for coming to Hong Kong to listen, learn, discuss, and network. That is what the community is all about!

For more information about RTAS 2024 and the papers featured in its program, please refer to the RTAS 2024 website.

Call for Papers and Experts – 30th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2024) in Hong Kong

I have the honor of being the Program Chair of the 30th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2024), located in Hong Kong May 13-16 next year. Please see the Call for Papers below.

Soon, it will be time to put together the Technical Program Committee (TPC) that will review and select the papers that will appear in the conference program. If you are interested in joining the TPC of this conference, or any other conference (co-)sponsored by the Technical Community of Real-Time Systems (TCRTS), please fill out the TPC self-nomination form as soon as possible. We always welcome self-nominations from our own community, but this year we especially encourage self-nominations from the academic performance engineering community, as well as members of the industry that work with real-time requirements or performance engineering, defined in a broad sense.

If you have any questions, please feel to reach out to me. If want to self-nominate, click this link. A self-nomination is not a firm commitment, it is just a declaration of interest that may result in an invitation.


30th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2024)

Hong Kong, May 13-16, 2024




RTAS is a top-tier conference with a focus on time-sensitive systems. RTAS’24 invites papers describing case studies, applications, methodologies, and algorithms that contribute to the state of practice in design, implementation, verification, validation, and evolution of time-sensitive systems. RTAS’24 consists of two tracks:

  • Track 1. Systems and Applications;
  • Track 2. Applied Methodologies and Foundations.

In both tracks, papers must consider some kind of timing requirements. The timing requirements of interest are broadly defined and include not only classical hard real-time constraints, but also soft real-time, probabilistic, quality-of-service (QoS), throughput or latency requirements. The application area can be any type of time-sensitive systems, ranging from resource-constrained embedded systems to cyber-physical systems (CPS), cloud/edge/fog computing systems, cloud data centers, Internet of Things (IoT), mobile computing, robotics,  smart grid, and smart cities, as well as middleware and frameworks, machine learning in or for time-sensitive systems and signal processing algorithms that execute in real time. RTAS welcomes both papers backed by formal proofs, as well as papers that focus exclusively on empirical validation of timing requirements, e.g., using traces or performance models inferred from operational data. Research results from fundamental research, (case-driven) applied research, and (pragmatic) industry practice are all in scope.

RTAS’24 follows a double-anonymous peer reviewing process: author identities and affiliations will not be revealed to reviewers. Authors will have the opportunity to provide a response to reviews before acceptance decisions are made, solely to provide clarifications and correct misconceptions. The response will not allow authors to introduce new material beyond the original submission, or promise such material for the camera-ready version. There will be an optional evaluation process for accepted papers that assesses the reproducibility of the work.

Track 1: Systems and Applications

This track focuses on research of an empirical nature pertaining to (system- or component-) level analysis, optimization, and verification, as well as applications, runtime software, and hardware architectures for time-sensitive systems.

Topics relevant to this track include, but are not limited to:

  • time-sensitive applications
  • real-time and embedded operating systems,
  • hypervisors and runtime frameworks,
  • hardware architectures, memory hierarchies, FPGAs, GPUs and accelerators,
  • time-sensitive networks, CPS/IoT infrastructure,
  • microservice technologies, cloud and edge computing, real-time artificial intelligence and machine learning,
  • application profiling, WCET analysis, compilers, tools, benchmarks and case studies.

Papers discussing design and implementation experiences on real industrial systems are especially encouraged. Papers submitted to this track should focus on specific systems and implementations. Authors must include a section with experimental results performed on a real implementation, or demonstrate applicability to an industrial case study or working system. The experiment or case study discussions must highlight the key lessons learned. Simulation-based results are acceptable for architectural simulation, or other cases where authors clearly motivate why it is not feasible to develop and evaluate a real system.

Empirical survey-based research focused on the real-time systems field is also welcome in this track. This type of research uses surveys, questionnaires, interviews, use cases or other empirical techniques to obtain information about the past / current / future state of play in the research, design, development, verification, validation, and deployment of time-sensitive systems.

Track 2: Applied Methodologies and Foundations

This track focuses on fundamental models, and analysis techniques/methods that are applicable to time-sensitive systems to solve specific problems. The track welcomes knowledge-based models, models built from operational data, as well as a combination, and different types of analysis methods, including analytical, statistical, or probabilistic methods. Topics relevant to this track include, but are not limited to:

  • modelling languages, modelling methods, model learning, model validation and calibration,
  • scheduling and resource allocation,
  • system-level optimization and co-design techniques,
  • design space exploration,
  • verification and validation methodologies.

Papers must describe the main context or use case for the proposed methods giving clear motivating examples based on real systems. The system models and any assumptions used in the derivation of the methods must be applicable to real systems, and reflect actual needs. Papers must include a section on experimental results, preferably including a case study based on information from a real system. The use of synthetic workloads and models is acceptable if appropriately motivated and used to provide a systematic evaluation.

Important Dates

Submission Deadline (firm): October 31, 2023
Author Response Period: January 8-12, 2024
Author Notification: January 19, 2024
Conference Date: May 13-16, 2024