Andrew Nelson just had a paper “Power Versus Quality Trade-offs for Adaptive Real-Time Applications” accepted at ESTIMedia 2012. The paper is based on the work of Sjoerd te Pas, one of my graduated master students, and discusses how power consumption can be traded for application quality for adaptive real-time applications using existing DVFS techniques. The techniques are demonstrated for an H.263 application on an FPGA instance of the CompSOC platform. Stay tuned for the camera-ready version.
Update: The paper is now available online. Click here to read it.
For the next six months, I am a visiting resarcher at CISTER (Research Centre in Real-Time Computing Systems) based at the School of Engineering (ISEP) of the Polytechnic Institute of Porto (IPP), Portugal. This gives me a great opportunity to work with some of the great minds in the real-time community, broaden my knowledge by exploring new applications and research areas, as well as contribute with my experiences to the group. At this point, I am familiarizing myself with the work carried out in the group and the work plan will be defined during the coming month.
Update: After settling in at CISTER, I am now working on two projects. The first one relates to their work on bus contention analysis, which is a familiar topic with a different twist. The second project is related to implementation and evaluation of scheduling algorithms in the Linux kernel, which is a completely new topic. Of course, I am also still spending time managing the work of the memory team in Eindhoven. Some new, some old, but in the end I am learning many new things both technically and culturally, and I am meeting many extraordinary people.