Paper Accepted at PDP 2015

Today, we congratulate Hazem Ali for having a paper accepted at PDP 2015. The paper is entitled “Generalized Extraction of Real-Time Parameters for Homogeneous Synchronous Dataflow Graphs” and proposes a heuristic methodology for extracting real-time parameters, such as periods, deadlines and offsets, for applications specified as homogeneous synchronous data-flow (HSDF) graphs. The benefit of the approach is that it enables HSDF applications to be analyzed using traditional real-time techniques and scheduled with common real-time schedulers, such as earliest-deadline first.

Davit Mirzoyan Successfully Defends PhD Thesis!

On this day, Davit Mirzoyan confidently defended his PhD thesis, earning the right to call himself a doctor. The thesis is entitled Better than Worst-Case Design for Streaming Applications under Process Variation and discusses how process variation during chip manufacturing can be exploited during application mapping and voltage-frequency island partitioning to increase the number of chips that satisfy the real-time requirements of the application. The work is very interesting, as it captures how variation in transistor parameters affect application performance, thus tying together the lowest and the highest levels of system design.

An interesting fact is that due to circumstances beyond Davits control, he had to write his thesis and send it off to the committee in only two months, something most people would not be able to do, yet he delivered a nice piece of work that was referred to as a ‘very smooth read’ by the committee. As Davits co-promotor, I am very proud of his achievement and I have very much enjoyed working with him during the past four years. I wish him the best of luck in his future career.

Accepted Paper at ESTIMedia 2013

To our great delight, Davit Mirzoyan’s paper “Throughput Analysis and Voltage-Frequency Island Partitioning for Streaming Applications under Process Variation” has been accepted at ESTIMedia 2013. The paper extends his earlier work and presents a framework to estimate the probability distribution of application throughput (e.g. frames per second in video decoding) in a system with Voltage-Frequency Island (VFI) partitions in the presence of process variation. The novelty of the framework lies in the computation of the probability distribution of throughput, based on a user-specified set of clock-frequency levels per VFI domain considering both within-die and die-to-die variations of cores. A methodology is furthermore provided to perform variation-aware partitioning of the cores of a MPSoC into VFIs for maximized timing yield (percentage of chips that satisfy a given throughput requirement).

Paper Accepted at RTCSA 2013

Today, we congratulate Hazem Ali for having his first paper accepted at RTCSA. The paper is entitled “Critical-Path-First Based Allocation of Real-Time Streaming Applications on 2D Mesh-Type Multi-Cores” and proposes a mapping strategy for streaming applications, represented as acyclic data-flow graphs with throughput requirements, to multi-core architectures under partitioned EDF scheduling. The key idea is to first map tasks on the critical-paths of the application to minimize their execution time and thereby increasing the chance to satisfy the throughput constraint. The camera-ready version is available here.

Hazem Ali is a PhD student at the CISTER-ISEP Research Unit in Porto, supervised by Luis Miguel Pinho and myself, and this paper is a result of my six month visit there last year and the fruitful collaboration it has resulted in afterwards.